Semiconductor chips have an obvious and important role to play in next-generation technologies enabling artificial intelligence, quantum computing, and other mission-critical applications. These chips have improved steadily over decades and can now perform the complex algorithms needed to power everything from simple electronic devices to enterprise-grade systems.
Of equal importance is the microelectronic packaging needed to protect advanced chips, which generate large amounts of heat and can be sensitive to environmental pollutants. The goal is to achieve a hermetically sealed package that allows these chips to perform at the very highest level. Ultimately, the challenge lies in selecting the right packaging materials and processes.
In this article, we focus on higher-end packages. We will examine manufacturing methods utilizing advanced microelectronic packaging materials.
Figure 1
Hermetic sealing for next-generation applications requires both advanced materials and, perhaps more importantly, innovative process techniques. Miniaturization makes process control somewhat challenging, while larger packaging demands proper thermal management.
Emerging applications require the package to:
A true hermetic sealing process is carefully designed with delicate dimensions, tolerance, and process controls. All materials must undergo stringent inspection, including a detailed validation report to augment standard quality reporting.
Figure 2
An effective hermetic seal can last for decades, thanks to advanced materials and processes that strengthen the package and increase the life of components and devices.
An advanced package usually starts with ceramic or metal alloy-based materials. The following process provides a sequential approach to achieving hermetic packaging, assuming these parameters:
Figure 3
Figure 4
Packaging materials are carefully selected based on the intended application. Here are basic guidelines for packaging development:
|
No |
Guidelines |
Material Options |
|
1 |
Is thermal management required for the chip? |
Diamond or copper-based material |
|
2 |
How much thermal dissipation is required? |
Highter TC value demands diamond-based material |
|
3 |
Must the package be radiation-safe? |
Tantalum exhibits exceptional radiation shielding capabilities |
|
4 |
Should the package have capability to be optically operated? |
Sapphire or Boro float windows to seal the package |
|
5 |
Are multiple chips required in a single package? |
SIP metal package, larger surface area |
|
6 |
Will the package be subject to a temperature cycle test? |
Gold-tin solder for an effective hermetic seal |
|
7 |
Are die attach materials eutectic or epoxy-based? |
Eutectic die attach offers less outgassing, prolonging the package |
|
8 |
Is there outgassing from the epoxy die attach that could affect die performance? |
Mission-critical applications will be affected by outgassing within the package |
|
9 |
Are packaging materials ceramic or metal alloy-based? |
Ceramic and metal are designed for different applications. Both can be made to work to achieve good hermetic packaging. |
|
10 |
Are the walls of the package designed with adequate space for true hermetic sealing? |
Wall width decides the contact area for leak-safe hermetic sealing. |
A wide range of materials is available for package design, including cover alloys, pure elemental solders, and pure solder alloys.
Ceramic packages are generally used to mount the chip, with consideration given to the die pad, bond pads for wires, and seal rings on top of side walls. Seal ring dimensions are most critical for hermetic seals as the starting point for the design of sealants and covers. Metal-based packages are commonly associated with optoelectronic packaging.
Questions to consider when determining hermetic covers include:
Figure 5
The final phase is selecting the hermetic cover (see Figure 4 above). Assuming ceramic packaging is selected, these materials lend themselves best to hermetic sealing:
Figure 6
Figure 7
Figure 8
The top cover must closely match the seal rings and combine well with sealants. Cover selection must also consider thermal expansion with respect to ceramic seal rings, the size of the package, and the type of sealants. Whether it’s a ceramic, metal, radio frequency or an optical package, covers and sealing materials should be carefully selected based on historical success rate.
Figure 9
Covers are usually made from metal alloy such as ASTM F-15 (iron-nickel-cobalt). These are normally electroplated to keep core raw materials from oxidizing. Covers are also gold-plated for solder to bond the cover lid to the package seal ring.
Hermetic sealed packages are tested per Mil-Standard 883.
Sealant typically consists of fluxing-free solder alloys carefully manufactured with very low levels of impurities (<100ppm). Irregularities in composition, dimensions, or volume of the solder could compromise an otherwise leak-safe joint.
The outer lid and outer solder dimension are matched almost equally to the package outer seal ring. The solder frame is then tacked to the metal lid at the corners for accurate melting to bond both the metal cover and the package seal ring.
The “solder stop” technique keeps solder from flowing into the package cavity. This prevents PIND failure and helps to optimize solder volume to achieve a solid fillet. The solder stop can be applied to many different types of lids and covers.
Figure 10
The importance of hermetic sealing for emerging technologies cannot be overstated. A compromised package can cause catastrophic damage to a module or an entire system, often rendering it beyond repair. It’s important for those involved in chip manufacturing to understand the basics of cover design and material selection. As packages decrease in size, the techniques described here will be invaluable in taking best advantage of smaller available